Extended Long-Reach (XLR) Multi Standard SerDes (MSS) IP

Overview

The UltraAthenaCORE Extended Long-Reach (XLR) Multi Standard SerDes (MSS) IP is a high-performance, area and latency optimized, DSP-based PHY. It is a highly configurable IP that supports all leading edge NRZ and PAM data center standards from 10 Gbps to 224 Gbps, supporting diverse protocols such as 10/25/50/100/200 Gbps Ethernet and UALink.

UltraAthenaCORE leverages high- performance A/D converters to digitize incoming data over copper or fiber. UltraAthenaCORE Master Controller uses patented signal processing techniques to recover the signal, while optimizing both power and latency.

  1. UltraAthenaCORE: 10-224Gb/s long-reach multi-standard optical and electrical SerDes for Ethernet applications and Ultra Accelerator Link (UALink)
  2. Optical IM-DD: 50-224Gbps optical optimized SerDes with MLSD for data center applications
  3. PCIe7/CXL: 1-128Gb/s PCIe Gen1 – Gen7 long-reach electrical SerDes
  4. CPO/NPO: power optimized 50-224Gb/s medium reach (MR/VSR) electrical SerDes for emerging CPO/NPO applications
  5. Coherent Lite: Coherent DSP optical optimized SerDes for data center applications

 

Key Features

Protocol Features (ANLT, LLPD)

UltraAthenaCORE includes protocol features critical in next generation technologies: ANLT (802.3 AutoNegotiation, Link Training) and PCIe-critical low-latency phase detector, fast rate changes and low power modes.

Most Likely Sequence Detector (MLSD)

MLSD uses Viterbi Detection to make slicing decisions based on a sequence of data symbols. MLSD minimizes decision error across a sequence of symbols and improves the Signal-to-Noise Ratio and Bit Error Rate of systems.

Flexible D/A

The UltraAthenaCORE MSS IP has options for a standard long reach swing, a high swing driver for optical applications, and a short reach optimized driver to optimize PPA.

Master controller

The AthenaCORE DSP Master Controller includes:

  • All required training is integrated, without the need of external RAM
  • Non-destructive eye monitoring
  • 1+D Partial Response Coding

Benefits

  • Receive Equalization
    • Designed for closed eye, backplane systems greater than 45db of insertion loss at Nyquist (53GHz) for PAM4 with high MLSD. Includes blind adaptive equalizer and channel estimator.
  • Output Driver Voltage
    • Programmable 400 – 1200 mVdiff-pkpk (inner eye)
    • Optional Optical Non-Linearity Correction Features

Technical Specifications

Samsung
Pre-Silicon: 5nm
TSMC
Silicon Proven: 5nm , 6nm , 7nm
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Semiconductor IP