PMBus Verification IP

Overview

The PMBus Verification IP provides an effective & efficient way to verify the components interfacing with PMBus interface of an IP or SoC. The PMBus VIP is fully compliant with Rev. 1.4 of PMBus specifications. This VIP is a lightweight VIP with easy plug-and-play interface so that there is no hit on the design cycle time.

Key Features

  • Fully compliant with Rev. 1.4 of the PMBus Specification.
  • Support for all SMBus protocols with and without PEC (Packet Error Checking).
  • Support for SMBus ARP (Address Resolution Protocol) for dynamically assigning a unique address to each slave device.
  • Support Group command protocol for multiple PMBus device communication.
  • In addition to command code protocols also supports extended command code protocol.
  • Supports ZONE_CONFIG & ZONE_ACTIVE commands.
  • Zone read and Zone write to access some or all devices on bus including their pages.
  • Support for Command control code and all PMBus commands.
  • Support STATUS_BYTE And STATUS_WORD command for fault management and reporting
  • Supports generation of transactions with UVM register model.
  • Built in Bus Monitor provides extensive protocol checking.
  • Supports various error injection and detection.
  • Provides verification scalability using functional coverage.
  • Provides logging facility for bus traffic in the ASCII format and in user configurable mode.
  • Supports timing checks in the Monitor.
  • Callbacks for user-defined transfers.
  • Supports transaction logging with detailed description of each transfer
  • Graphical analyser to show transactions for easy debugging

Block Diagram

PMBus Verification IP  
 Block Diagram

Deliverables

  • PMBus Master/Slave Agent
  • PMBus Monitor and Scoreboard
  • Test environment and test suit
    • Basic and directed protocol tests
    • Random Tests
    • Error Scenario Tests
    • Assertions & Cover Point Tests
  • Integration Guide, User Manual and Release Notes

Technical Specifications

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Semiconductor IP