PLL (Frequency Synthesizer) IP, Input: 5MHz - 300MHz, Output: 20MHz - 300MHz, UMC 90nm SP process
Overview
Input 5M-300MHz, output 20M-300MHz, frequency synthesizable PLL, UMC 90nm SP/RVT Low-K Logic process.
Technical Specifications
Foundry, Node
UMC 90nm SP
UMC
Pre-Silicon:
90nm
SP
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