PLL (Frequency Synthesizer) IP, Input: 5MHz - 200MHz, Output: 20MHz - 300MHz, UMC 0.15um SP process
Overview
Input 5M-200MHz, output 20M-300MHz, frequency synthesizable PLL, UMC 0.15um SP Logic process.
Technical Specifications
Foundry, Node
UMC 150nm SP
UMC
Pre-Silicon:
150nm
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