PLL (Frequency Synthesizer) IP, Input: 5MHz - 100MHz, , Output: 20MHz - 300MHz, UMC 0.25um process
Overview
Input 5M-100MHz, output 20M-300MHz, frequency synthesizable PLL, 0.25um Logic process.
Technical Specifications
Foundry, Node
UMC 250nm
UMC
Pre-Silicon:
250nm
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