MIPI D-PHY/LVDS Combo TX (Transmitter) for Automotive in Samsung 28FDSOI

Overview

The MXL-LVDS-DPHY-DSI-TX is a combo PHY that consists of a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY and a high performance 4-channel LVDS Serializer implemented using digital CMOS technology.
In D-PHY mode, The IP can be configured as a MIPI Master optimized for display (DSI) applications. The High-Speed signals have a low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed data traffic while low power functions are mostly used for control.
In LVDS mode, both the serial and parallel data are organized into 4 channels. The parallel data is 7 bits wide per channel. The input clock is 25MHz to 150MHz. The serializer is highly integrated and requires no external components. The circuit is designed in a modular fashion and desensitized to process variations. This facilitates process migration, and results in a robust design.

Key Features

  • Consists of 1 Clock lane and up to 4 Data lanes
  • Supports MIPI Standard 1.1 for D-PHY
  • Supports both high speed and low-power modes
  • 80 Mbps to 1.05Gbps data rate in high speed mode
  • 10 Mbps data rate in low-power mode
  • High Speed Serializer included
  • Optional resistance termination calibrator
  • 24-150 MHz clock support for LVDS
  • Up to 1050 Mbps bandwidth/channel for LVDS
  • LVDS supports 8-channel mode

Benefits

  • Combo PHY for both MIPI D-PHY CSI-2 TX and LVDS
  • Silicon proven in Samsung 28FDSOI

Block Diagram

MIPI D-PHY/LVDS Combo TX (Transmitter) for Automotive in Samsung 28FDSOI Block Diagram

Applications

  • Mobile
  • Displays
  • IoT
  • VR/AR/MR
  • Consumer electronics
  • Automotive

Deliverables

  • Specifications
  • GDSII
  • LVS netlist
  • LEF file
  • IBIS Model
  • Verilog Model
  • Timing Model
  • Integration Guidelines
  • RTL
  • Documentation
  • One year support

Technical Specifications

Foundry, Node
Samsung, 28FDSOI
Maturity
Silicon Proven
Availability
Now
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Semiconductor IP