FCoE Verification IP

Overview

Fibre Channel over Ethernet Verification IP provides an efficient and smart way to verify Fibre Channel over Ethernet MAC, PCS and serdes of a SOC or a ASIC.The SmartDV's Fibre Channel over Ethernet Verification IP is fully compliant with standard FCoE Specification (FC-BB-5, Rev 2.00) and provides the following features.

FCoE Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

FCoE Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key Features

  • Compliant with the latest Fibre Channel over Ethernet specification(FC-BB-5) Rev 2.00.
  • Compliant with SCSI Architecture Model 3/4/5 (SAM-3/4/5).
  • Supports N,F and E ports.
  • Support for multiple initiators and targets.
  • Supports generation of all types of FC frames.
  • Supports verification of all layers of Fibre channel.
  • Supports FCoE controller.
  • Supports 1G and 10G as per 802.3 Ethernet.
    • GMII interface
    • XGMII interface
  • Support Ethernet frames.
  • Supports Fabric Login/Logout,Port Login/Logout and Process Login/Logout.
  • Multiple outstanding exchanges support.
  • Support for all SCSI commands.
  • Support for multiple Logical Unit Number(LUN) addressing.
  • Supports completely configurable target/device discovery.
  • Supports the full Fibre Channel fabric functionality
    • ENodes and FCFs
    • VN_Port to VF_Port Virtual Links
    • VE_Port to VE_Port Virtual Links
  • Supports error injection and detection at each layer
    • Invalid frame fields
    • Invalid EOF and SOF
    • Oversize and undersize frames
    • Disparity errors
    • Invalid code group errors
    • Invalid K and D character
    • CRC error
  • Retry control.
  • FCoE virtualizes the FC constructs over Ethernet
    • ENode: a FC Node supporting FCoE on at least one Ethernet interface
    • FCF: a Switch supporting FCoE on at least one Ethernet interface
    • VN_Port to VF_Port: a Virtual Link between an ENode and an FCF
    • VE_Port to VE_Port: a Virtual Link between two FCFs
  • Supports Pause frame generation and detection.
  • Glitch insertion and detection.
  • Comes with Tx BFM, Rx BFM, and Monitor.
  • Built in coverage analysis.
  • Status counters for various events in bus.
  • Proficiency to generate random frames and respond to frames in directed or randomized fashion.
  • Rich set of configuration parameters to control Fibre Channel Over Ethernet functionality.
  • Monitor supports detection of all protocol violations
  • Supports constrained randomization of protocol attributes.
  • Callbacks in initiator, target and monitor for various events.
  • Fibre Channel over Ethernet Verification IP comes with complete test suite to test every feature of Fibre Channel over Ethernet specification.
  • Functional coverage for complete Fibre Channel Over Ethernet features.

Benefits

  • Faster testbench development and more complete verification of FCoE designs.
  • Easy to use command interface simplifies testbench control and configuration of initiator, target and monitor
  • Simplifies results analysis.
  • Runs in every major simulation environment.

Block Diagram

FCoE Verification IP Block Diagram

Deliverables

  • Complete regression suite containing all the FCoE testcases.
  • Examples showing how to connect various components, and usage of Tx,Rx and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Technical Specifications

×
Semiconductor IP