eDP1.4/DP1.4 TX IP PHY

Overview

eDP/DP_TX consists of electrical sub-blocks of main-link and AUX channel of PHY for eDP/DP TX. eDP/DP_TX supports 1 or 2 lanes at 1.62Gbps(RBR) or 8.1Gbps(HBR3) for the main link, and one lane up to 1Mbps for the AUX channel.

Key Features

  • eDP/DP v1.4a compliant Physical layer for Tx
  • Consists of two main link channels and one AUX channel
  • Supports 1.62Gbps(RBR) to 8.1Gbps(HBR3) bit rate
  • Supports main link operation with 1, 2 and 4 lanes.
  • Integrated 100-ohm termination resistors with common-mode biasing.
  • Integrated equalizer with tunable strength.
  • Configurable analog characteristics

Technical Specifications

Short description
eDP1.4/DP1.4 TX IP PHY
Vendor
Vendor Name
Foundry, Node
12FFC
Maturity
under development
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Semiconductor IP