DC-DC IP, Input: 3.3V, Output: 5V/100mA, UMC 65nm SP process

Overview

Boosting voltage from 3.3V to 5V, 100mA driving capability, Ivcca=200uA @ Idrive=0, Pulse Width Modulator, UMC 65nm SP/HVT Logic Low-K process.

Technical Specifications

Foundry, Node
UMC 65nm SP
UMC
Pre-Silicon: 65nm SP
×
Semiconductor IP