IP Catalog > Memory & Libraries IP > I/O Library IP > High-speed IP > LVDS IP > 200 Mbps LVDS IP library

200 Mbps LVDS IP library

Overview

055TSMC_LVDS_03 is a library including:

  •  Transmitter LVDS driver (TX_LVDS);
  •  Receiver LVDS driver (RX_LVDS);
  •  Reference current/voltage generators (RS_TOP).

The RS_TOP block is intended to output reference currents and voltage for RX_LVDS driver and TX_LVDS driver.

Composing of LVDS library components allows to design a device with up to 2 pairs of data channels and 2 pairs of synchronization channels.
 

Key Features

  • TSMC CMOS 55 nm
  • TIA/EIA-644 LVDS standards without hysteresis
  • Data transfer rate: up to 200Mbps
  • 2.5V IO voltage supply
  • 1.2V core voltage supply
  • 1.2V CMOS input/output logic control signals
  • Embedded 1.2V/2.5V level shifters

Block Diagram

200 Mbps LVDS IP library Block Diagram

Applications

  • Point-to-point data transmission
  • Multidrop buses
  • Clock distribution
  • Backplane receiver
  • Backplane data transmission
  • Cable data transmission

Deliverables

  • Schematic or NetList
  • Abstract model (.lef and .lib files)
  • Layout view (optional)
  • Behavioral model (Verilog)
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentationn

Technical Specifications

Foundry, Node
TSMC CMOS 55 nm
Maturity
silicon proven
Availability
Now
TSMC
Silicon Proven: 55nm FL
Request Info

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