The Public Key Crypto Engine is a versatile IP core for hardware offloading of all asymmetric cryptographic operations.
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Security IP cores provide the hardware foundation required to protect modern SoC and ASIC designs against an increasingly sophisticated threat landscape. They enable secure data processing, trusted device operation, intellectual property protection, and compliance with industry security standards.
This category includes a comprehensive range of security technologies, from cryptography engines for encryption, decryption, hashing, and authentication, to interface security solutions that protect data in transit. It also covers key management IP for secure key generation and storage, root of trust implementations that establish a trusted security foundation, secure processing architectures for isolated execution of sensitive workloads, and side-channel protection technologies designed to mitigate power, timing, electromagnetic, and fault-injection attacks.
This catalog allows you to explore and compare Security IP cores from leading vendors based on security capabilities, performance, certification readiness, attack resistance, silicon maturity, and process node compatibility.
Whether you are developing connected IoT devices, automotive platforms, industrial equipment, consumer electronics, networking infrastructure, or cloud and edge computing systems, you can identify the security IP solutions needed to build resilient and trustworthy semiconductor products.
The Public Key Crypto Engine is a versatile IP core for hardware offloading of all asymmetric cryptographic operations.
XTS-AES IEEE P1619 Core Families
XTS2 and XTS3 (formerly known as XEX2 and XEX3) implement the NIST standard AES cipher in the XEX/XTS mode for encryption and dec…
Implementation of the new WLAN security standard (802.16e) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a.
Ultra-Compact Advanced Encryption Standard (AES, FIPS-197) Core
The AES core implements Rijndael cipher encoding and decoding in compliance with the NIST Encryption Standard.
802.11i CCM (CTR+CBC) AES Core for WiFi WLAN
Implementation of the new WLAN security standard 802.11i requires the NIST standard AES cipher in CTR and CBC modes (a.k.a.
The DES/3DES crypto engine offers a hardware implementation of the Data Encryption Standard (DES) according to Federal Informatio…
AES Multi-purpose crypto engine
The AES Multi-Purpose crypto engine includes a generic and scalable implementation of the AES algorithm and a configurable wrappe…
High speed MACsec Engine 100G/200G/400G/800G/1.6T
IEEE 802.1AE-2018 Line-Rate Ethernet Layer 2 Security IP Core
UALinkSec is the ultimate security solution for UALink systems, designed for scalable high-performance application environments, …
MACsec Protocol Engine for 1G/10G+ Ethernet
The MAC-SEC-MG IP core implements a compact and configurable custom-hardware protocol engine for the IEEE 802.1AE (MACsec) standa…
EdDSA Curve25519 signature generation engine
EdDSA IP Core — When Safety and Security Meet the Best Size/Performance Ratio The EdDSA Curve25519 extension adds hardware suppor…
ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
The KiviPQC™-Box is a hardware accelerator for post-quantum cryptographic operations.
ML-DSA Digital Signature Engine
The KiviPQC™-DSA is a hardware accelerator for post-quantum cryptographic operations.
P1619 / 802.1ae (MACSec) GCM/XTS/CBC-AES Core
LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption standard IEEE P1619 u…
Inline Decrypter & Authenticator IP Core for Automotive
The Inline Decrypter and Authenticator IP core enables on-the-fly execution of encrypted and signed code from Flash.
PKC Multi Hardware Accelerator IP
The PKC Multi hardware accelerator is a secure connection engine that can be used to offload the compute intensive Public Key ope…
XMSS Post-Quantum Cryptography IP
XMSS is a Post-Quantum Cryptographic (PQC) algorithm, meaning it is mathematically designed to be robust against a cryptanalytic …
Hardware Security Module (HSM) for AMD Xilinx Versal ACAP device
The HSM IP module is a Hardware Security Module for a wide range of applications.
The SHA cores provide implementation of cryptographic hashes “Keccak” SHA-3 (cores SHA3-224, SHA3-256, SHA3-384 and SHA3-512) and…
1.6T/3.2T Multi-Channel MACsec Engine with TDM Interface (MACsec-IP-364)
MACsec solution for data center, service providers, 5G and AI The MACsec-IP-364 is a MACsec/IPsec engine developed specifically f…