VPU IP

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Compare 13 IP from 7 vendors (1 - 10)
  • VPU R3.0 on Artix 7 100T
    • Video processing system suitable for high-speed, high resolution video systems
    • HDMI Full-HD (1920x1080p) input & output at 60fps
    • High-speed processing at 60fps
    • Uses FPGA for parallel processing
    Block Diagram -- VPU R3.0 on Artix 7 100T
  • VPU R1.0 on Artix 7 200T
    • Video processing system suitable for high-speed, high resolution video systems
    • HDMI Full-HD (1920x1080p) input & output at 60fps
    • High-speed processing at 60fps
    • Uses FPGA for parallel processing
  • VPU R2.6 on Artix 7 200T
    • Video processing system suitable for high-speed, high resolution video systems
    • HDMI Full-HD (1920x1080p) input & output at 60fps
    • High-speed processing at 60fps
    • Uses FPGA for parallel processing
    Block Diagram -- VPU R2.6 on Artix 7 200T
  • VPU R3.0 on Artix 7 200T
    • Video processing system suitable for high-speed, high resolution video systems
    • HDMI Full-HD (1920x1080p) input & output at 60fps
    • High-speed processing at 60fps
    • Uses FPGA for parallel processing
    Block Diagram -- VPU R3.0 on Artix 7 200T
  • Vector Unit
    • 64-bit
    • FP & Int, 8b to 64b
    • DLEN up to 2048b
    Block Diagram -- Vector Unit
  • High Bandwidth In-Order RISC-V IP Core
    • Decodes 2 instructions/cycle
    • In-order issue
    • Gazzillion Misses™
  • 64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
    • 64-bit in-order dual-issue 8-stage CPU core with up to 1024-bit Vector Processing Unit (VPU)
    • Symmetric multiprocessing up to 8 cores
    Block Diagram -- 64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
  • High performance dual-issue, out-of-order, 7-stage Vector processor (DSP) IP
    • Design Flexibility
    • Portability
    • Ease of programmability
    Block Diagram -- High performance dual-issue, out-of-order, 7-stage Vector processor (DSP) IP
  • Scalable Edge NPU IP for Generative AI
    • Ceva-NeuPro-M is a scalable NPU architecture, ideal for transformers, Vision Transformers (ViT), and generative AI applications, with an exceptional power efficiency of up to 3500 Tokens-per-Second/Watt for a Llama 2 and 3.2 models
    • The Ceva-NeuPro-M Neural Processing Unit (NPU) IP family delivers exceptional energy efficiency tailored for edge computing while offering scalable performance to handle AI models with over a billion parameters.
    Block Diagram -- Scalable Edge NPU IP for Generative AI
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Semiconductor IP