Sifive IP
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Multi-core capable 64-bit RISC-V CPU with vector extensions
- The SiFive® Intelligence™ X180 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the far edge.
- With this 64-bit version, X100 series IP delivers higher performance and better integration with larger memory systems.
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Multi-core capable 32-bit RISC-V CPU with vector extensions
- The SiFive® Intelligence™ X160 core IP products are designed to meet the increasing requirements of embedded IoT and AI at the far edge.
- With this 32-bit version, X100 series IP can be optimized for power efficiency and severely area-constrained applications.
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Multi-core capable RISC-V processor with vector extensions
- The SiFive® Intelligence™ X280 Gen 2 is an 8-stage dual issue, in-order, superscalar design with wide vector processing (512 bit VLEN/256-bit DLEN).
- It supports RISC-V Vectors v1.0 (RVV 1.0) and SiFive Intelligence Extensions to accelerate critical AI/ML operations.
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High-performance AI dataflow processor with scalable vector compute capabilities
- Matrix Engine
- 4 X-Cores per cluster
- 1 Cluster = 16 TOPS (INT8)
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Powerful AI processor
- SiFive Intelligence Extensions for ML workloads
- 512-bit VLEN
- Performance benchmarks
- Built on silicon-proven U7-Series core
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4x improvement to vector computation with 4x sustained bandwidth of prior generations
- 1024-bit VLEN
- SiFive Intelligence Extensions for ML workloads
- 512-bit vector register length processor
- Performance benchmarks
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Highest performance Six-wide, out-of-order core with a shared cluster cache enabling up to a 32-core cluster
- Full support for the RVA22 RISC-V profile specification and Vector 1.0 and Vector Crypto for enabling 64-bit apps processors running feature rich OS stacks such as Linux and Android.
- Breakthrough RISC-V performance
- >12 SpecINT2k6/GHz (P870 Processor)
- P800-Series Architectural Features
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Highly efficient out-of-order RISC-V vector application processor series
- Full support for the RVA22 RISC-V profile specification
- Best-in-class RISC-V performance efficiency
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32-bit RISC-V processor specifically designed for the Automotive and Functional Safety markets
- 32-bit RISC-V ISA
- ASIL B and ASIL D area optimised product variants
- Functional Safety Package and Independent Assessment
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Highest performance four-issue, out-of-order RISC-V vector application processors
- Breakthrough RISC-V performance
- Multi-core, multi-cluster processor configurations with up to 16 cores
