SPI 4.2 IP

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Compare 17 IP from 11 vendors (1 - 10)
  • SPI 4.2 MACO Core
    • Fully compliant with OIF-SPI4.02.0 Specification
    • Supports up to 256 logical ports
    • 700 Mbps operation in Static Mode
    • 1+ Gbps operation in Dynamic Mode
    Block Diagram -- SPI 4.2 MACO Core
  • BLE 4.2 SoC White Box IP
    • General features
    • RF features
    • Power management module features
  • SD/SDIO 3.0 Card Controller
    • Compatible with SD/SDIO specification 3.0 with 1 and 4 bit data transfer.
    • Option to support MMC 4.2 with 8-bit data width.
    • Support SD, SPI and optional MMC bus protocol.
    • Support standard capacity, high capacity (SDHC) and extended capacity (SDXC) memory cards.
    Block Diagram -- SD/SDIO 3.0 Card Controller
  • SD Card Input/Output Protocol Controller
    • Compliance with Embedded MultiMediaCard System Specification Version 4.51. Card support for three different databus modes: 1-bit (default), 4-bit and 8-bit
    • Full compatibility with previous versions of MultiMediaCards (backward compatibility)
    • Full compliance with SD memory card specifications version 4.2 ( SPI mode and UHS-II mode not supported)
  • SMIC 55nm LL BLE4.2 PHY IP
    • Process: SMIC 55nm Low Leakage MS/RF, 1P7M, Ultra Thick Metal (UTM), DNW
    • Supply voltage: 1.5V to 3.6V,Operating Temperature: Industrial -40°C to 85°C
    • Compliant with the Bluetooth 4.2 Low Energy Single Mode RF Standard.
    • Low power consumption: RX: < 4mA @ 3.0V;TX: < 5mA @ 3.0V ;sleep mode: <1uA
  • Bluetooth Low Energy (BLE) RF IP
    • Single supply voltage: 1.5V to 3.6V
    • Operating junction temperature: -40ºC to 85ºC
    • RF output power: upto +2dBm
    • Low power consumption: RX: <12mW; TX: <15mW@0dBm
  • 1.8V/3.3V I/O library with ODIO and 5V HPD in TSMC 16nm
    • A 1.8V/3.3V flip-chip I/O library with 4kV HBM ESD protection, I2C compliant ODIO and Hot-Plug Detect.
    • This library is a production-quality, silicon-proven I/O library in TSMC 16nm technology.
    • Supports multi-voltage GPIOs, capable of operating at 1.8V or 3.3V, dynamically selectable at the system level.
    Block Diagram -- 1.8V/3.3V I/O library with ODIO and 5V HPD in TSMC 16nm
  • SDIO 8.0 Verification IP
    • SDIO Specification 1.0/2.0/3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) compliant.
    • Supports SDIO, SD Memory, SD Combo card and Multi-media cards.
    • Easily configurable to work as SDIO aware or non-SDIO aware Host controller.
    • Card detection on DAT [3] line in SD mode and CS line in SPI mode.
    Block Diagram -- SDIO 8.0 Verification IP
  • DVB-C Demodulator
    • The demodulator is designed to be used together with a cable tuner and an analog to digital converter (ADC).
    • The system has an internal state machine to control the operation, which can be externally configured via the SPI interface.
    • This DVB-C QAM demodulator is supplied as a portable and synthesizable Verilog-2001 IP.
  • ISDB-T Modulator
    • ARIB STD-B31 compliant operation, supporting one, two or three-layers
    • Drop-in module for Spartan-6™, Virtex-6™, Artix-7™, Kintex-7™, Virtex-7™ FPGAs and Zynq™
    Block Diagram -- ISDB-T Modulator
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Semiconductor IP