SDI IP

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Compare 106 IP from 28 vendors (1 - 10)
  • SDI II Intel® FPGA IP Core
    • The serial digital interface (SDI) II Intel FPGA intellectual property (IP) core implements a transmitter, receiver or full-duplex SDI at standard definition, high definition or 3G to 12G rate as defined by the Society of Motion Picture and Television Engineers
    • The SDI II IP core supports multiple standards
    • These modes provide automatic receiver rate detection and transceiver dynamic reconfiguration.
    Block Diagram -- SDI II Intel® FPGA IP Core
  • SMPTE Serial Data Interface (SDI) Verification IP
    • Full SMPTE SDI Tx and Rx device functionality.
    • Supports 12 Gb/s Signal/Data Serial Interface as per SMPTE ST 2082-1:2015.
    • Supports 6 Gb/s Signal/Data Serial Interface as per SMPTE ST 2081-1-2015.
    • Supports Source Image Format and Ancillary Data Mapping for the 3 Gb/s Serial Interface as per SMPTE ST 425-1:2011
    Block Diagram -- SMPTE Serial Data Interface (SDI) Verification IP
  • SDI Verification IP
    • Compliant with SDI-12 Version 1.4.
    • Supports standard, fast, and high speed operations.
    • Full SDI Recorder and Sensor functionality.
    • Monitor, Detects and notifies the testbench of all protocol and timing errors.
    Block Diagram -- SDI Verification IP
  • SMPTE Serial Data Interface (SDI) Synthesizable Transactor
    • Supports SMPTE ST 425-1:2011 (Source Image Format and Ancillary Data Mapping for the 3 Gb/s Serial Interface)
    • Supports SMPTE ST 292-1:2011 (1.5 Gb/s Signal/Data Serial Interface)
    • Supports SMPTE ST 372:2011 (Dual Link 1.5 Gb/s Digital Interface for 1920 × 1080 and 2048 × 1080 Picture Formats)
    • Supports SMPTE 296M-2001 (1280x720 Progressive Image Sample Structure Analog and Digital Representation and Analog Interface)
    Block Diagram -- SMPTE Serial Data Interface (SDI) Synthesizable Transactor
  • SMPTE SDI Transmitter IIP
    • Compliant with standard protocol of SMPTE SDI 2.2A
    • Full SMPTE SDI Transmitter device functionality
    • Supports 12 Gb/s Signal/Data Serial Interface as per SMPTE ST 2082-1:2015
    • Supports 6 Gb/s Signal/Data Serial Interface as per SMPTE ST 2081-1-2015
    Block Diagram -- SMPTE SDI Transmitter IIP
  • SMPTE SDI Receiver IIP
    • Compliant with standard protocol of SMPTE SDI 2.2A
    • Full SMPTE SDI Receiver device functionality
    • Supports 12 Gb/s Signal/Data Serial Interface as per SMPTE ST 2082-1:2015
    • Supports 6 Gb/s Signal/Data Serial Interface as per SMPTE ST 2081-1-2015
    Block Diagram -- SMPTE SDI Receiver IIP
  • SDI Mapper for TICO-RDD35 & TicoXS (JPEGXS) lightweight codecs
    • Manage both the TX & RX
    • Manage the insertion of the TICO-RDD35 or JPEG-XS detection box over the active area of the SDI
    Block Diagram -- SDI Mapper for TICO-RDD35 & TicoXS (JPEGXS) lightweight codecs
  • SMPTE SDI
    • SMPTE 259 (SD-SDI)
    • SMPTE 292 (HD-SDI)
    • SMPTE 372 (Dual Link HD-SDI)
    • SMPTE 424 and 425 (3G-SDI) including levels A, B-DL, and B-DS
  • SDI to Video Bridges
    • Embeds and extracts synchronization signals into and out of the SDI data stream.
    • Creates and embeds line numbers into the SDI data stream.
    • Generates clock enables for SDI-SDI and 3G-SDI level B modes.
    • Supports YCbCr data format at 10-bits per component.
  • Triple-Rate SDI on Spartan-6 FPGAs
    • SMPTE 259 (SD-SDI)
    • SMPTE 292 (HD-SDI)
    • SMPTE 372 (Dual Link HD-SDI)
    • SMPTE 424 and 425 (3G-SDI) including levels A, B-DL, and B-DS
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Semiconductor IP