Root of Trust Engine IP

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Compare 9 IP from 5 vendors (1 - 9)
  • Embedded Flash Protection with Hardware Root of Trust and Lite Crypto Engine
    • PUFef is designed to protect embedded flash with the hardware root of trust and a lite crypto engine of RC6.
    Block Diagram -- Embedded Flash Protection with Hardware Root of Trust and Lite Crypto Engine
  • Upgraded PUF-based Crypto Coprocessor (Compliant with TLS 1.3 / FIPS 186-5)
    • PUF-based Hardware Root of Trust (Riscure Common Criteria Certified)
    • Comprehensive Crypto Engine (NIST CAVP Certified)
    • PSA Certified Level 2 Ready
    Block Diagram -- Upgraded PUF-based Crypto Coprocessor (Compliant with TLS 1.3 / FIPS 186-5)
  • PUF-based Hardware Root of Trust
    • PUF-based Unique ID
    • PUF-based True Random Number Generator
    • PUF-based Secure Key Storage
    Block Diagram -- PUF-based Hardware Root of Trust
  • tRoot Vx Hardware Secure Modules
    • The Synopsys tRoot Vx HSMs include a highly secure hardware Root of Trust that enables devices to boot securely and permits encryption and decryption of sensitive data allowing it to be stored in non-secure devices or memory. It provides a completely secure environment in a non-secure system from which applications can execute secure cryptographic services.
    • The tRoot Vx HSMs secure SoCs by using unique code protection mechanisms that provide run-time tamper detection and response. Code privacy protection is achieved without the added cost of dedicated secure memory. This unique feature reduces system complexity and cost by allowing the tRoot Vx HSM’s firmware to reside in any non-secure memory space.
    • Commonly, tRoot Vx programs reside in shared system DDR memory. Due to the confidentiality and integrity provisions of the secure instruction controller, this memory is effectively private to the HSM and impervious to attempts to modify it originating in other subsystems in the chip, or from outside. The tRoot Vx HSM’s ROM-less architecture can support system design changes at any time without risk of exposing the system memory to threats and without additional engineering development cost. To minimize the number of attack vectors, tRoot Vx HSMs use a simple interface with a limited set of interactions with the host processor.
  • tRoot V023 FS Hardware Secure Module, ASIL-B compliant (w/ ARC EM22FS)
    • Safety mechanisms for ASIL B compliance for random faults and ASIL D compliance for systematics
    • Scalable cryptography AES/SHA/ECC/RSA acceleration from CPU custom instructions, to cryptographic cores
  • Root of Trust eSecure module for SoC security
    • Secure Boot
    • Firmware update in the field
    • Secure key storage
    Block Diagram -- Root of Trust eSecure module for SoC security
  • Secure Boot Hardware Engine
    • Protection Layers
    • Public-Key Authentication Benefits
    • Fast & Compact
    Block Diagram -- Secure Boot Hardware Engine
  • NPU IP family for generative and classic AI with highest power efficiency, scalable and future proof
    • Support wide range of activations & weights data types, from 32-bit Floating Point down to 2-bit Binary Neural Networks (BNN)
    Block Diagram -- NPU IP family for generative and classic AI with highest power efficiency, scalable and future proof
  • Network Security Crypto Accelerator
    • Scalable architecture & crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    • 100% CPU offload with low latency and high throughput
    Block Diagram -- Network Security Crypto Accelerator
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Semiconductor IP