Reed-Solomon Codec IP

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Compare 11 IP from 8 vendors (1 - 10)
  • IEEE 802.3bj Reed-Solomon Encoder and Decoder
    • Compliant with IEEE 802.3bj, Clause 91
    • Support for KR4 (528, 514) and KP4 (544, 514) Reed-Solomon (RS) code
    • Corrects up to seven (KR4) or up to 15 (KP4) erroneous symbols
    Block Diagram -- IEEE 802.3bj Reed-Solomon Encoder and Decoder
  • 100G Reed-Solomon Codec for Ethernet IEEE 802.3 Clause 91 (803.3bj)
    • FEC Sublayer for 100GBASE-CR4 and 100GBASE-KR4 PHY (clause 91 of the IEEE 802.3bj standard).
    • 100G Ethernet MAC-friendly interface
  • Reed-Solomon Memory Protection Codec
    • Fast parallel encoding and decoding suitable for memory protection
    • Support data widths from 16 to 32 bits
    • One to two nibbles error correction
  • Highly Integrated Reed Solomon Codec
    • Polynomial compliant to Intelsat IESS-308; RTCA DO-217 AppendixF, Revision D Standard.
    • High throughput rate.
    • Fully programmable to correct from 1 to 10 error bytes or 20 erasure bytes per block.
    • Configurable odd or even number of check bytes.
    Block Diagram -- Highly Integrated Reed Solomon Codec
  • Reed Solomon Codec
    • Full errors and erasures Reed-Solomon CODEC using the Berlekamp Massey algorithm for efficient implementation.
    • Can be synthesised for any Galois Field and Reed-Solomon code.
    • Supports shortened codes.
    • Supports Erasure processing as used in DVB-MPE and Variable-T (punctured) modes as used in IEEE 802.16.
  • 2.5 Gbps GPON FEC Codec
    • This high performance core is a full featured Forward Error Correction encoder and decoder, specially designed for high speed optical networks or any other broadband applications.
    • It is fully compliant with the 2.5 Gbps GPON standard (G.984.3) and is available for FPGA or ASIC implementation.
    • The FEC algorithm is based on Reed-Solomon (255,239) code and consists of an encoder and decoder module.
    Block Diagram -- 2.5 Gbps GPON FEC Codec
  • IEEE 802.16 WirelessMAN OFDM Channel Codec
    • Fully compliant with the 802.16a WirelessMAN-OFDM-Phy Layer Specification.
    • Simple MAC management of burst profile changes within the upstream and downstream channels.
    • Advanced Error Control capability using Symbol Weight inputs.
    • Designed in C++ with vector matched VHDL source code.
  • Reed Solomon Codec (Errors-only)
    • Errors Only Reed-Solomon CODEC using the Berlekamp Massey algorithm for efficient implementation.
    • Register programmable, fixed or synchronous “on-the-fly” loading for different values of N in a Reed-Solomon (N, N-2T) code. T fixed by synthesis.
    • Supports shortened codes.
    • Can be synthesised for any Galois Field, Reed-Solomon code, and correcting power T, with maximum values for N set by synthesis parameters.
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Semiconductor IP