RISC-V Multicore Vector Processor IP
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64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
- 64-bit in-order dual-issue 8-stage CPU core with up to 1024-bit Vector Processing Unit (VPU)
- Symmetric multiprocessing up to 8 cores
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Multi-core capable RISC-V processor with vector extensions and Intelligence Extensions
- SiFive Intelligence Extensions for ML workloads
- 512-bit vector register length:
- Built on silicon-proven U7 series core:
- High performance vector memory subsystem
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High-performance 64-bit RISC-V architecture multi-core processor with AI vector acceleration engine
- Instruction set: RISC-V RV64GC/RV 64GCV;
- Multi-core: Isomorphic multi-core with 1 to 4 optional clusters. Each cluster can have 1 to 4 optional cores;
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Highly efficient out-of-order RISC-V vector application processor series
- Full support for the RVA22 RISC-V profile specification
- Best-in-class RISC-V performance efficiency
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High performance three-issue, out-of-order RISC-V vector application processor
- Breakthrough RISC-V performance
- Enabling next generation applications
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ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
- High-speed, 32-bit, dual-issue, 10-stage pipeline
- Multicore support for up to 16 CPUs and up to 16 user hardware accelerators per processor cluster
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Highest performance four-issue, out-of-order RISC-V vector application processors
- Breakthrough RISC-V performance
- Multi-core, multi-cluster processor configurations with up to 16 cores
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ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications
- High-speed, 32-bit, dual-issue, 10-stage pipeline
- Multicore support for up to 16 CPUs and up to 16 user hardware accelerators per processor cluster
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Vector processor
- SiFive Intelligence Extensions for ML workloads
- 512-bit VLEN
- Performance benchmarks
- Built on silicon-proven U7-Series core
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High performance Linux capable vector processor
- RV64GCV ISA with Sv39 or Sv48 support
- 8-stage dual-issue in-order pipeline with decoupled vector unit
- Machine, Supervisor, and User privilege modes
