Post-Quantum Cryptography Accelerator IP
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APB Post-Quantum Cryptography Accelerator IP Core
- Implements ML-KEM and ML-DSA post-quantum cryptography digital signature standards. The system interface is an microprocessor slave bus (APB, AHB, AXI options are available).
- The design is fully synchronous and requires only minimal CPU intervention due to internal microprogramming sequencer.
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Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
- Turn-key implementations of the NIST FIPS recommended CRYSTALS post-quantum for key encapsulation (KEM) and digital signature algorithm (DSA)
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Post-Quantum Cryptography IP: Crystals Kyber - Crystals Dilithium - XMSS - LMS
- 512 and/or 768 and/or 1024-bit secret key length
- Implementation protected against Side-Channel Attacks (Key Generation and Key Decapsulation operations are sensitive):
- Hybrid hardware-software tunable solution
- Tunable in performance or power/area
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Agile PQC Public Key Accelerator
- Agile IP comprised of HW/FW/SW, adaptable to future standards’ evolution
- Highly configurable IP can be tuned for specific applications with most optimal PPA
- Scalable PQC PKA IP complies with latest NIST PQC algorithms
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SHA3 core for accelerating NIST FIPS 202 Secure Hash Algorithm
- Supports variable length SHA-3 Hash Functions
- Supports Extendable Output Functions (XOF)
- Configurable architecture for achieving the required performance and silicon area
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Cryptographic Cores IP
- The Cryptographic Cores IP portfolio delivers secure, high-performance implementations of symmetric, asymmetric, and post-quantum algorithms.
- Designed for low-area, low-latency operation, the silicon-proven cores help SoC designers and embedded teams build trusted, efficient devices for IoT, automotive, medical, and industrial markets.