OIF-CEI-25G-LR 28G Serdes IP

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Compare 5 IP from 3 vendors (1 - 5)
  • 28G LR Multi-Protocol SerDes (MPS) PHY - Samsung 14nm
    • Optimized for low-power operation and north/south die-edge placement
    • Duplex Lane configurations of x4 and x1
  • 28G LR Multi-Protocol SerDes (MPS) PHY - GLOBALFOUNDRIES 12nm
    • Optimized for low-power operation and north/south die-edge placement
    • Duplex Lane configurations of x4 and x1
  • SerDes IP
    • 10dB to 35dB bump-to-bump insertion loss
    • Multi-rate support for 56Gbps to 112Gbps PAM4 and NRZ
    • Integrated PLL
    • Robust clock distribution architecture
    • Advanced mixed signal analog equalization architecture
    • Fully adaptive and programmable RX equalization
    • Auto-negotiation
    • Link Training
    Block Diagram -- SerDes IP
  • 56G-LR Pam4 SerDes PHY
    • Supports Ethernet, FC, CPRI, and eCPRI protocols
    • Compliant to IEEE 802.3ck and OIF standard electrical specifications
    • Supports 56Gbps PAM4 and 28G, 10G, and sub-10Gbps NRZ data rates
    • Unique firmware-controlled adaptive power design provides optimal power and performance tradeoffs and more efficient system designs based on platform requirements
    • Continuous calibration and adaption provide robust performance across process, voltage, and temperature
    • Supports industrial temperature range -40°C – 125°C
  • Networking SerDes IP, Silicon Proven in ST 28FDSOI
    • Networking Application SERDES
    • From 1.25Gb/s to 15.5Gb/s
    • From 1.25Gb/s to 28Gb/s
    • Technology: 28FDSOI, 10ML
    Block Diagram -- Networking SerDes IP, Silicon Proven in ST 28FDSOI
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Semiconductor IP