MIPI Controller IP
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MIPI SPMI Target Controller
The System Power Management Interface is a two wire interface that connects the integrated power controller (PC) of a System-on-Chip (SoC) processor system with one or more Power Management Integrated Circuits(PMIC) voltage regulation systems
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MIPI SPMI HOST CONTROLLER
The System Power Management Interface is a two wire interface that connects the integrated power controller (PC) of a System-on-Chip (SoC) processor system with one or more Power Management Integrated Circuits(PMIC) voltage regulation systems
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MIPI LLI Controller
- The LLI Controller connects two chips together to create a single “virtual chip”, with both chips sharing the same memory.
- This is achieved by the low latency from the “companion” chip to the memory interface of the host chip.
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MIPI I3C Controller and Target Functionality
- Supports MIPI I3C v1.1.1 specification
- Compliant with MIPI I3C Conformance Test Suite (CTS) v1.0
- Supports the MIPI I3C Host Controller Interface and DDR5 JEDEC JESD403-1 and System Management MCTP specifications
- Supports SDR, HDR-DDR, HDR-TSL/TSP; all data rates up to 33.4 Mbps
