IEEE 802.1AS Hardware Protocol Stack IP

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Compare 4 IP from 2 vendors (1 - 4)
  • MACsec Protocol Engine for 10/100/1000 Ethernet
    • The MAC-SEC-1G IP core implements a compact and configurable custom-hardware protocol engine for the IEEE 802.1AE (MACsec) standard.
    • It supports all cipher suites provisioned by the MACsec standard and the VLAN-in-Clear improvement and is silicon- and performance-optimized for networks operating up to 1Gbps.
    Block Diagram -- MACsec Protocol Engine for 10/100/1000 Ethernet
  • 1G to 100G Single-Port MACsec Engine
    • Complete HW/SW system.
    • Driver Development Kit.
    • High-speed MACsec Frame Engine
    • Silicon-proven implementation
    • Fast and easy to integrate into SoCs.
    • Flexible layered design.
    Block Diagram -- 1G to 100G Single-Port MACsec Engine
  • AES XTS/GCM Accelerators
    • Wide bus interface
    • Basic AES encrypt and decrypt operations
    • Key sizes: 128, 192 and 256 bits
    • Key scheduling in hardware, allowing key, key size and 
direction changes every 13/15/17 clocks with zero impact 
on throughput
    • Hardware reverse (decrypt) key generation
    Block Diagram -- AES XTS/GCM Accelerators
  • MACsec software toolkit
    • IEEE 802.1AE (data plane)
    • IEEE 802.1x -2010 (control plane)
    • MKA (MACsec Key Agreement)
    • Network Announcements
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Semiconductor IP