Timing and Synchronization protocol implementation for application in Automotive Ethernet (AVB/TSN), Industrial automation and control, Professional audio/video systems,5G fronthaul/backhaul synchronization and Data center TSN and deterministic networking
The IEEE 802.1AS software stack implements the Timing and Synchronization protocol for time-sensitive applications over bridged and wireless networks. Based on a profile of the Precision Time Protocol (PTP) as defined in IEEE 1588, 802.1AS provides precise synchronization of clocks across all network devices, enabling accurate time distribution for Time-Sensitive Networking (TSN) and other real-time applications.
The AS stack offers a standardized and interoperable method for distributing time across multi-vendor environments. It is based on a profile of the widely adopted Precision Time Protocol (PTP) and ensures deterministic timing behavior and supports seamless integration with other Time-Sensitive Networking (TSN) features. This helps guarantee low-latency, low-jitter communication, which is essential for applications that rely on tightly synchronized events.
Additionally, the 802.1AS stack can leverage hardware timestamping for extremely accurate timing measurements, allowing synchronization across large and complex networks without significant overhead. The stack also supports dynamic role switching—such as selecting the best clock in the network via the Best Master Clock Algorithm (BMCA)—which improves network resilience and adaptability.
Standards Compliance
- Full support for IEEE 802.1AS-2020 (including updates from the -2011 revision)
- Conformance with IEEE 1588v2 as a PTP profile
- Compatibility with Time-Sensitive Networking (TSN) frameworks
Feature Rich
- Sub-microsecond accuracy through support for hardware timestamping
- Stable and precise clock servo algorithms for adjusting local time
- Best Master Clock Algorithm (BMCA)
- Diagnostics and monitoring for real-time reporting
- Support for NETCONF/YANG
- Security options – extensibility for future 802.1AS security enhancements or MACsec integration
- Supporting 802.1ASds for half-duplex operation
Scalable modular architecture
- Portable design suitable for embedded, desktop, and network switch environments
- Separated modules for protocol engine, port management, clock control, and APIs
- Runtime changes to configuration (e.g., enabling/disabling ports, changing priorities)
- Support for fast recalibration and network topology changes.
Hardware integrated and interoperability tested
- Integrated tightly with the Comcores Time Stamp Unit
- Works with other TSN protocols like 802.1Qbv, Qci, and Qcc
- Plug-fest tested
The IP Core can be delivered in Source code or Encrypted format. The following deliverables will be provided with the IP Core license:
- Solid documentation, including User Manual and Release Note
- Simulation Environment, including Simple Testbed, Test case and Test Script
- Programming Register Specification
- Timing Constraints in Synopsys SDC format
- Access to support system and direct support from Comcores Engineers.
- Synopsys SGDC Files (optional)
- Synopsys Lint, CDC and Waivers (optional)
