Fault-tolerant processor IP
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Fault-tolerant 32-bit SPARC V8 processor
- Register file SEU error-correction of up to 4 errors per 32-bit word
- Cache memory error-correction of up to 4 errors per tag or 32-bit word
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32-bit Embedded RISC-V Functional Safety Processor
- Designed for Functional Safety
- Efficient Embedded RISC-V Processor
- Powerful Debug Features
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RISC-V Application Processor
- RISC-V 64IMC, with AFDN (ie GCN) to be released
- RISC-V standard PLIC
- RISC-V standard PMP (physical memory protection)
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Single- and double-precision IEEE-754 floating-point unit
- IEEE-754 compliant, supporting all rounding modes and exceptions
- Operations: add, subtract, multiply, divide, square-root, convert, compare, move, abs, negate
- Data formats: single and double precision (32- and 64-bit floats)
- Fully pipelined, 3 clock cycles latency for all operations except divide and square-root