RISC-V Application Processor

Overview

The NOEL-V is a synthesizable VHDL model of a processor that implements the RISC-V architecture. The NOEL-V is designed for space applications: with its high-performance and fault-tolerant design, NOEL-V is the ideal choice for satellites, rovers, and other space-bound systems. Built on the RISC-V architecture, NOEL-V offers unparalleled flexibility and customization, allowing SoC designers to create solutions tailored to their specific needs.

The NOEL-V processor core is available as part of a subsystem that also contains system peripherals. The subsystem can be configured to use different processor configurations, going from high-performance to area-optimized implementations.

The processor can be efficiently implemented on FPGA and ASIC technologies and uses standard synchronous memory cells for caches and register file.

Key Features

  • RISC-V IMAFDBCH
    • 64-bit or 32-bit architecture
    • Optional fault tolerance features
    • Designed and maintained in Europe
    • Multi-core support (SMP and AMP)
    • Hardware multiply and divide units
    • Compressed (16 bit) instruction support
    • Machine, supervisor and user mode
  • RISC-V standard PLIC
  • RISC-V standard PMP (physical memory protection)
  • RISC-V standard external debug support
  • Advanced 7-stage dual-issue in-order pipeline
  • Dynamic branch prediction, branch target buffer and return address stack
  • Four full ALUs, two of them late in the pipeline to reduce stalls
  • Separate instruction and data L1 cache (Harvard architecture) with snooping
  • Configurable L2 cache: 256-bit internal, 1-4 ways, 16 KiB - 8 MiB
  • AMBA 2.0 AHB bus interface, 64- or 128-bit wide
  • Robust and fully synchronous single-edge clock design
  • Extensively configurable
  • Large range of software tools: compilers, kernels and debug monitors
  • High performance: 4.36 CoreMark/MHz
  • IEEE-754 FPU
    • User level interrupts
    • Power-down mode and clock gating
    • Hypervisor support
    • Symmetric Multiprocessing (SMP) support

Technical Specifications

Maturity
NOEL-V will be released on December 25 2019.
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Semiconductor IP