DisplayPort 1.4a IP
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26
IP
from 6 vendors
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10)
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DisplayPort 1.4a IP Core
- 1,2,3 & 4 lanes
- 1.62, 2.7, 5.4 and 8.1 Gbps link rate (includes eDP rates)
- HDCP 1.3 / 2.2
- MST support, up to 4 streams
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Simulation VIP for DisplayPort
- Device Support
- Source, Sink, Link Training-Tunable PHY Repeater (LTTPR/retimer)
- Main Link Interface
- Serial, Parallel (10-bit, 20-bit, 40-bit)
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Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 55SP
- DisplayPort version 1.4 compliant receiver
- PHY supports 1.62Gbps (RBR) to 5.4Gbps (HBR2) bit rate
- Integrated 100-ohm termination resistors with common-mode biasing
- Integrated equalizer with tunable strength
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Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 55SP
- eDP version 1.4a / DP version 1.4 compliant transmitter
- Supports HDCP1.4 and HDCP2.2(Optional)
- Supports Forward Error Correction (Optional)
- Consists of configurable (4/2/1) link channels and one AUX channel
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Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
- eDP version 1.4a / DP version 1.4 compliant transmitter
- Supports HDCP1.4 and HDCP2.2(Optional)
- Supports Forward Error Correction (Optional)
- Consists of configurable (4/2/1) link channels and one AUX channel
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Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
- eDP version 1.4a / DP version 1.4 compliant transmitter
- Supports HDCP1.4 and HDCP2.2(Optional)
- Supports Forward Error Correction (Optional)
- Consists of configurable (4/2/1) link channels and one AUX channe
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Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 40SP
- DisplayPort version 1.4 compliant receiver
- PHY supports 1.62Gbps (RBR) to 5.4Gbps (HBR2) bit rate
- Integrated 100-ohm termination resistors with common-mode biasing
- Integrated equalizer with tunable strength
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Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP
- eDP version 1.4a / DP version 1.4 compliant transmitter
- Supports HDCP1.4 and HDCP2.2(Optional)
- Supports Forward Error Correction (Optional)
- Consists of configurable (4/2/1) link channels and one AUX channel
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Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
- eDP version 1.4a / DP version 1.4 compliant transmitter
- Supports HDCP1.4 and HDCP2.2(Optional)
- Supports Forward Error Correction (Optional)
- Consists of configurable (4/2/1) link channels and one AUX channel
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Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
- eDP version 1.4a / DP version 1.4 compliant transmitter
- Supports HDCP1.4 and HDCP2.2(Optional)
- Supports Forward Error Correction (Optional)
- Consists of configurable (4/2/1) link channels and one AUX channel
