Computer Vision DSP IP
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6
IP
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High Performance Scalable Sensor Hub DSP Architecture
- Self contained, specialized sensor hub on-device processor
- Unifies multi-sensor processing with AI and sensor fusion
- Highy-configurable 8-way VLIW architecture
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Imaging and Computer Vision Processor
- Superior performance
- Low power consumption
- Flexible and scalable
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Intelligent Vision Processor
- Fully programmable in high level languages
- Scalar and Vector units to handle a mix of control and parallel code efficiently
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64-bit CPU with RISC-V Vector Extension
- AndeStar™ V5 Instruction Set Architecture (ISA), compliant to RISC-V technology
- RISC-V vector extension
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64-bit CPU with RISC-V Vector Extension
- AndeStar™ V5 Instruction Set Architecture (ISA), compliant to RISC-V technology
- RISC-V vector extension
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64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
- 64-bit in-order dual-issue 8-stage CPU core with up to 1024-bit Vector Processing Unit (VPU)
- Symmetric multiprocessing up to 8 cores