256 8-bit-MAC DSP core

Overview

ZSP5000H is a programmable Vector Digital Signal Processor Core targeted for high performance Computer Vision and Image processing applications. The programmer friendly architecture offers an orthogonal instruction set that greatly simplifies programming complex Image processing algorithms as well as control code with a high-performance C/C++ compiler.

ZSP5000H is ideally suited for vision and image processing applications that need software flexibility, as well as high performance. It can achieve up to 180 GMacs/s worst case performance in 14nm technology. ZSP5000H is supported by a comprehensive software development toolkit - ZView, that includes a vectorizing C/C++ compiler, rich support for intrinsics, and support for multi-core debug. VeriSilicon offers a broad portfolio of optimized software to help product developers from concept to market.

Key Features

  • High performance vector signal processing and efficient control code processing
  • 256 8-bit macs, or 128 16-bit macs, or 32-bit macs per cycle
  • Flexible vector permute operations
  • Maskable vector lanes
  • 8/16/32/64 bit data types 2K bit data bandwidth
  • TCM and Cache memories
  • Up to 32 scatter/gather per cycle
  • ZTurbo interface for custom instructions and accelerators
  • Optional vector & scalar FPUs
  • Low power modes of operation
  • Compatible, scalable roadmap

Benefits

  • Software flexibility, Performance efficiency
  • Easy to program
  • Easy to integrate into any SOC
  • Control + DSP capability in a single core
  • Compatible with other ZSP Cores for multicore

Technical Specifications

Foundry, Node
All
Maturity
Silicon Integration
Availability
now
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Semiconductor IP