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CAN-SEC CANsec Acceleration Engine IP

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  • CANsec Acceleration Engine
    • The CAN-SEC IP core implements a hardware accelerator for the CANsec extension of the CAN-XL protocol, as defined in CiA’s 613-2 specification.
    • The CANsec specification provisions two ciphers with key lengths of 128, 192, or 256 bits to protect CAN XL frames’ payload, all of which are supported by the hardware accelerator.
    Block Diagram -- CANsec Acceleration Engine
  • CAN-SEC Bus Controller IP
    • The CAN-SEC Acceleration Engine Core implements the CAN-XL Protocol (CiA 610-1), CAN-XL Addon Part 1-Simple/Extercontent Indication (CiA 613-1), and CAN-XL Addon Part 2-Security (CiA 613- 2) Protocols.
    • The CAN-SEC Acceleration Engine core is easy to integrate with the Host processor using AMBA-APB, AHB_Lite or AMBA-AXI standard interface.
    Block Diagram -- CAN-SEC Bus Controller IP
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Semiconductor IP