112Gbps SerDes IP

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Compare 4 IP from 3 vendors (1 - 4)
  • 100G SerDes PAM4 PHY
    • The SERDES PHY IP delivers a high-performance, low-power solution for high-speed interfaces up to 112Gbps.
    • It supports diverse applications including AI accelerators, data centers, 5G infrastructure, and automotive SoCs.
    Block Diagram -- 100G SerDes PAM4 PHY
  • 112G-ELR PAM4 SerDes PHY - TSMC 5nm
    • TSMC 5nm FinFET CMOS Process
    • Power-optimized for ELR and LR links
    • Integrated BIST capable of producing and checking PRBS
    • 56-112Gbps PAM4 or 1-56Gbps NRZ data rates
  • Complete 1.6T Ultra Ethernet IP Solution
    • Ethernet MAC, PCS and PHY to complete a full Ultra Ethernet interface stack
    • Supports evolving IEEE 802.3 and OIF-224G electrical standards
    • Provides support for 4 x 400G, 2 x 800G, and 1.6T Ethernet rates using 112Gbps and 224Gbps SerDes
    • Meets performance criteria for chip-to-chip, chip-to-module, and long reach copper/backplane interconnects
    Block Diagram -- Complete 1.6T Ultra Ethernet IP Solution
  • 112G-XSR Pam4 for TSMC 7nm FinFET CMOS
    • TSMC 7nm FinFET CMOS Process
    • 112G PAM4 interface compatible to LR and VSR
    • Eight-lane compact footprint for high-density designs
    • Integrated BIST capable of producing and checking PRBS
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Semiconductor IP