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SATA PHY IP

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Search (31)
Compare 31 SATA PHY IP from 12 vendors (1 - 10)
  • Serial ATA (SATA) PHY Transceiver IP
    • SMS6000 is a fully integrated CMOS transceiver that handles the low level Serial ATA protocol and signaling.
    • It contains all necessary Clock synthesis, Clock Recovery, Serializer, Deserializer, Comma detect for 8B/10B encoded data and Frame alignment functionalities.
    Block Diagram -- Serial ATA (SATA) PHY Transceiver IP
  • SATA PHY
    • Serial ATA II Revision 2.6 compliant
    • Gen1i, Gen1m, Gen2i, Gen2m compliant
    • Gen1x, Gen2x compatible
    • Initialization and power saving modes
    Block Diagram -- SATA PHY
  • SATA/SAS 3.0 transceiver IP with PMA and PCS layer
    • Highly customizable PMA configuration (controlled by PCS), X4 per Quad
    • Support SATA data rate 1.5/3/6Gbps
    • Support SAS data rate 1.5/3/6/12Gbps
    • Digitally-control-impedance termination resistors
    Block Diagram -- SATA/SAS 3.0 transceiver IP with PMA and PCS layer
  • USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP, Silicon Proven in UMC 28HPC
    • Compliant with PCIe 3.1 Base Specification
    • Compliant with Universal Serial Bus 3.2 Specification
    • Compliant with Universal Serial Bus 2.0 Specification
    • Compliant with UTMI 1.05 Specification
    Block Diagram -- USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP, Silicon Proven in UMC 28HPC
  • SATA 6G PHY in GF (40nm, 28nm)
    • Compliant with SATA/eSATA v3.3, AHCI v1.3 and SATA PIPE v4.3 specifications
    • AMBA 2.0 AHB and AMBA 3 AXI subsystem interfaces
    • AMBA 4 AXI and ACE-Lite bus interfaces
    • Memory data protection and memory address parity protection
  • USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
    • Support for SATA3(6.0Gbps) ,USB3.0(5Gbps) and PCIe3(8.0Gbps),
    • Backward compatible with 1.5Gbps, 3.0bps for SATA
    • Backward compatible with 2.5Gbps and 5Gbps for PCIe
    • Full compatible with PIPE4 interface specification
  • USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 16FFC
    • Compatible with PCIe/USB3/SATA base Specification
    • Fully compatible with PIPE3.1 interface specification
    • Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
    • Support 16-bit or 32-bit parallel interface when encode/decode enabled
  • USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP
    • Compatible with PCIe/USB3/SATA base Specification
    • Fully compatible with PIPE3.1 interface specification
    • Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
    • Support 16-bit or 32-bit parallel interface when encode/decode enabled
  • USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 40LL
    • Compatible with PCIe/USB3/SATA base Specification
    • Fully compatible with PIPE3.1 interface specification
    • Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
    • Support 16-bit or 32-bit parallel interface when encode/decode enabled
  • SATA 6G PHY in UMC (40nm, 28nm, 22nm)
    • Compliant with SATA/eSATA v3.3, AHCI v1.3 and SATA PIPE v4.3 specifications
    • AMBA 2.0 AHB and AMBA 3 AXI subsystem interfaces
    • AMBA 4 AXI and ACE-Lite bus interfaces
    • Memory data protection and memory address parity protection
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