MIPI C-PHY IP
As part of the MIPI (Mobile Industry Processor Interface) standard, MIPI C-PHY IP provides optimized signal integrity and low power consumption, making it ideal for high-speed applications such as imaging, video, and sensor communication. With its unique encoding scheme, MIPI C-PHY IP can support multiple data lanes, ensuring faster and more efficient data transfer while minimizing power usage.
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MIPI C-PHY IP
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MIPI C-PHY IP
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MIPI CPHY Verification IP
- Full MIPI CPHY Transmitter and Receiver functionality.
- Supports 2.0 MIPI CPHY Specifications.
- Supports up to 32 trio lanes.
- Supports both serial and PPI functionality testing.
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C-PHY Verification IP
- Compliant to MIPI C-PHY Specification version 2.1 with PPI interface.
- Supports all configuration of a data lane module as specified in Figure 6 of C-PHY specification version 2.1 for Data Lane Module (MFAA & SFAA, MFAE & SFAE, MFEA & SFEA, MFAN & SFAN, MFEE & SFEE, MFEN & SFEN).
- Supports ULPS, Triggers and LPDT in low power escape mode.
- Bi-directional Data lane turnaround is supported for escape mode
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MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC7FF 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
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MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC7FF 1.8V, N/S, for Automotive, ASIL B Random, AEC-Q100 Grade 2
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
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MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC6FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
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MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC6FF 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
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MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
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MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
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MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
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MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
