Frac-N PLL IP for UMC

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Compare 5 Frac-N PLL IP for UMC from 3 vendors (1 - 5)

All Digital Fractional-N RF Frequency Synthesizer PLL in UMC 40LP
- Fractional Multiplication with frequencies up to 8GHz
- Extremely low jitter (< 300fs RMS)
- Small size (< 0.05 sq mm)
- Low Power (< 15mW)
General Purpose All Digital Fractional-N PLL in UMC 40LP
- Low jitter (< 18ps RMS)
- Small size (< 0.01 sq mm)
- Low Power (< 3.5mW)
- Support for multi-PLL systems
10MHz to 50MHz fractional-N PLL synthesizer
- UMC 22nm ULP technology
- 1.8V IO power supply
- Double 0.8/1.0V Core power supply
- Embedded low noise bias
$Block Diagram -- 10MHz to 50MHz fractional-N PLL synthesizer$
Integrated Droop Response System
- Observable
- Tightly Coupled
- Process Portable
Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
- Process portable
- Proven (65nm to 3nm)
- Full SCAN testable
- Core voltage supply