Inline Memory Encryption IP for TSMC
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- 7nm
-
Fast Inline Cipher Engine, AES-XTS/GCM, SM4-XTS/GCM, DPA
- One input word per clock without any backpressure
- Design can switch stream, algorithm, mode, key and/or direction every clock cycle
- GCM: throughput is solely determined by the data width, data alignment and clock frequency
- XTS: block processing rate may be limited by the number of configured tweak encryption & CTS cores; a configuration allowing 1 block/clock is available
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In-line Multi-Protocol Cipher Engine
- IPSec (IPv4 and IPv6):
- and 6379),
- MACsec
- 802.1AE