Image Codec for TSMC

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Compare 4 Image Codec for TSMC from 2 vendors (1 - 4)
  • OpenGL ES 2.0 3D graphics IP core for FPGAs and ASICs
    • D/AVE NX is the latest and most powerful addition to the D/AVE family of rendering cores.
    • It is the first IP to bring 3D graphics OpenGL ES 2.0 rendering (with some ES 3.0 / 3.1 extensions) to the FPGA and SoC world and – with offline-shader compilers – even into MCUs or low-end MPUs with small amounts of memory and bare-metal or RTOS operation systems.
    Block Diagram -- OpenGL ES 2.0 3D graphics IP core for FPGAs and ASICs
  • 3D OpenGL ES 1.1 GPU IP core
    • D/AVE 3D is cost-efficient IP core for 3D graphics applications.
    • This core is available for FPGAs, ASICs and SOCs, specifically designed for the embedded, automotive and infotainment market with a big emphasis on flexibility both in hardware and the software.
    Block Diagram -- 3D OpenGL ES 1.1  GPU IP core
  • 2.5D GPU
    • The D/AVE HD 2.5D GPU family is an evolution of the D/AVE 2D family supporting high quality 2D and 3D rendering for displays up to 4K x 4K.
    • Targeting modern graphics applications on high resolution displays in the Industrial, Medical, Military, Avionics, Automotive and Consumer markets, the D/AVE HD fixed-function 2.5D GPU core is designed to be fast with powerful functionality.
    Block Diagram -- 2.5D GPU
  • JPEG encoder
    • Baseline JPEG compliant (ITU T.81), Motion JPEG
    • Up to 12 bits depth possible (default: 8 bit)
    • Super low latency (less than 1/10 of frame duration for rolling shutter cameras)
    • Lossy compression by default
    • Fully bit and cycle accurate co-simulation model available in Docker container
    Block Diagram -- JPEG encoder
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Semiconductor IP