Power Management IP for TSMC

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Compare 174 Power Management IP for TSMC from 18 vendors (1 - 10)
  • LDO Voltage Regulator, Adjustable 0.45 V to 0.9 V Output, 30 mA, TSMC N3P
    • The LDO IP is a 1.2V low-quiescent-current adjustable output voltage Low-Drop-Out (LDO) Linear Regulator implemented in the TSMC 3nm N3P CMOS process technology.
    • Its low sleep current, 30 mA maximum current, output voltage adjustability and precision make it especially suitable for use as an integrated voltage regulation source for subsystems implemented in analog, digital, mixed-signal and RF ASICs and SoCs.
    Block Diagram -- LDO Voltage Regulator, Adjustable 0.45 V to 0.9 V Output, 30 mA,  TSMC N3P
  • LDO Voltage Regulator, 250 mA, TSMC N3P
    • TSMC 3nm FinFET process
    • Input voltage: 1.2 V
    • Output voltage range: 0.45 V to 0.9 V
    • Vout adjustable in 50 mV increments
    Block Diagram -- LDO Voltage Regulator, 250 mA, TSMC N3P
  • 40 mA LDO voltage regulator (3.3/5.0V to 1.8V)
    • TSMC 180nm technology 
    • 1.8V output voltage
    • Output voltage trimming 
    • Maximum output load 40mA
    Block Diagram -- 40 mA LDO voltage regulator (3.3/5.0V to 1.8V)
  • 50mA CMOS buck regulator - TSMC 0.18µ
    • Input voltage range 3.0V – 5.5V.
    • Output voltage 1.8V ±5%.
    • 89% efficiency at 50mA.
    Block Diagram -- 50mA CMOS buck regulator - TSMC 0.18µ
  • Low Dropout Linear Regulator - TSMC 0.18µ
    • Input voltage range 3.0V – 5.5V.
    • Output voltage 1.8V ±5%.
    • Output fold back short circuit protection.
    • Over-temperature protection.
    • Works with straight-through IO pads.
    • External 4.7µF decoupling capacitor.
    Block Diagram -- Low Dropout Linear Regulator - TSMC 0.18µ
  • 75mA Core Voltage Regulator
    • Input voltage range 3.0V – 3.3V.
    • Output voltage 1.2V or 1.8V ±4%.
    • Output short circuit protection.
    • Bundled with Obsidian 1.2V bandgap reference.
    • Power down/enable input.
    • Fast response to current steps.
    Block Diagram -- 75mA Core Voltage Regulator
  • Power On Reset
    • Input threshold 2VT.
    • Reset and reset bar output logic levels.
    • Minimum 8uS reset pulse for any power rise time.
    • 1µA typical supply current.
    • -40°C to 120°C temperature operation.
    Block Diagram -- Power On Reset
  • TSMC 180nm 5V Bandgap
    • 2.5V-5.5V operation.
    • 3σ 4% untrimmed voltage reference accuracy.
    • 2% variation over -40ºC to 125ºC after trimming.
    • 70dB low frequency PSRR.
    • Trimmed, temperature compensated, 10µA reference current outputs with 3% accuracy.
    • Trimmed IPTAT output currents can be provided.
    • Less than 8µV noise from 0.1Hz to 10KHz.
    Block Diagram -- TSMC 180nm 5V Bandgap
  • Micro Power Bandgap for TSMC 180nm
    • Less than 1µW power dissipation.
    • Bandgap untrimmed precision of ±10% over process, temperature, and voltage.
    • 100nA PTAT bias current output.
    • 1.6V-2V operation
    • Power down input.
    Block Diagram -- Micro Power Bandgap for TSMC 180nm
  • Power On Reset on TSMC CLN7FF
    • Integrated voltage and time references for precision stand-alone operation
    • Easy to integrate with no additional component or special power requirements
    • Easy to use and configure
    • Programmable hysteresis, with independent programming available for power-on and power-off levels,
    Block Diagram -- Power On Reset on TSMC CLN7FF
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