Frac-N PLL IP for TSMC
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Frac-N PLL IP
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- 16nm
-
General Purpose All Digital Fractional-N PLL in TSMC N6/N7
- Low jitter (< 18ps RMS)
- Small size (< 0.01 sq mm)
- Low Power (< 3.5mW)
- Support for multi-PLL systems
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Low Power Frac-N on TSMC CLN16FFC
- Electrically Programmable PLL for multiple applications
- Ability to generate precise system clocks synchronized to track remote sources
- Very fine precision: near 1 part per billion resolution
- Fully integrated 32-bit datapath (8-bit integer plus 24-bit fractional)
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Integrated Droop Response System
- Observable
- Tightly Coupled
- Process Portable
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Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
- Process portable
- Proven (65nm to 3nm)
- Full SCAN testable
- Core voltage supply