Analog Front Ends IP for TSMC

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Compare 4 Analog Front Ends IP for TSMC from 2 vendors (1 - 4)
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  • 28nm
  • 6-bit, 1 GSPS High Performance AFE in 28nm CMOS
    • The ODT-AFE-6B1G-28HPCPT is a highperformance I/Q ADC and I/Q DAC designed in a 28nm CMOS process.
    • The 6-bit, 1.056GSPS I/Q ADC supports input signals up to 400 MHz and features a differential full-scale range of 0.6Vpp and excellent static and dynamic performance.
    • The ADC architecture is optimized to maximize performance while minimizing power and area consumption.
    Block Diagram -- 6-bit, 1 GSPS High Performance AFE in 28nm CMOS
  • 14-bit, 1200 MSPS Ultra Low Power AFE in 28nm CMOS
    • 14-bit resolution, sampling rate up to 1200 MSPS
    • Fully differential operation, fully specified from -40C to 125C
    • Ultra low power dissipation with patented SWIFT technology
    • SFDR > 70, ENOB > 10.5 bits
  • TSMC CLN28HPC+ 2.4GSps Analog Front-End
    • 1.8V analog and 0.9V digital supply voltage
    • Power consumption (ADC macro): 730mW (typical)
    • Power consumption (DAC macro): 220mW (typical)
    • Maximum sampling rate: 2.4GSps
  • TSMC CLN28HPC ABB Analog Front-End
    • TSMC 28nm CMOS High Performance Compact Mobile Computing (HPC) process
    • Metal Scheme: 5X2Z (1P8M)
    • 1.8V analog and 0.9V digital supply voltage
    • Five channel IQ-ADCs with analog filters
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