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from 3 vendors
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PUF
- Root of trust, unclonable, chip dependent ID with unique static and dynamic signature behavior in each chip
- Process dependent, fully invisible, root of trust
- Support 0.18um, 0.13um, 55nm, 40nm, 28nm, 14nm
- Small Area: 0.02mm2 (140um x 140um) @SMIC 55nm
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I3C
- Supports two-wire serial interfaces: SDA/SCL
- Supports primary master/slave only or dynamic configuration
- Supports secondary master
- Compliant with JESD403-1B and MIPI_I3C_Specification_V1.0
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eDP1.4 Transmitter PHY
- Area: 0.572mm2 (1040um x 550um) including IO and ESD
- Compliant with DP1.2 and eDP1.4 specification
- Typical 27MHz reference clock
- Support 1/2/4-lane configuration
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DP/eDP1.4/1.2 TX PHY&controller
- Area: 0.75mm2 with pixel PLL and 0.63mm2 without pixel PLL including IO and ESD
- Compliant with DP1.4 and eDP1.4specification
- Typical 27MHz reference clock
- Supports 1/2/4-lane configuration
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DP1.4 TX PHY
- Area: 0.75mm2 with pixel PLL and 0.63mm2 without pixel PLL including IO and ESD
- Compliant with DP1.4 and eDP1.4specification
- Typical 27MHz reference clock
- Supports 1/2/4-lane configuration
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DP/eDP1.4/1.2 RX PHY
- Compliant with DP1.4 and eDP1.4 specifications
- Supports 1/2/4-lane configuration
- Up to 8.1Gbps per data lane
- Typical 24MHz or 27MHz reference clock
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DP1.2 Transmitter PHY_40nm
- Area: 0.78mm2 including IO and ESD
- Note: The area parameter is for reference only. Please refer to the final LEF file for the actual values.
- Compliant with DP1.2 and eDP1.4 specifications
- Typical 27MHz reference clock
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DP1.2 Transmitter PHY
- Area: 0.68mm2 including IO and ESD
- Note: The area parameter is for reference only. Please refer to the final LEF file for the actual values.
- Compliant with DP1.2 and eDP1.4 specifications
- Typical 27MHz reference clock
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DP1.2 RX PHY
- Compliant with DP1.2 and eDP1.4 specifications
- Supports 1/2/4-lane configuration
- Up to 5.4Gbps per data lane
- Typical 24MHz or 27MHz reference clock
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General comparator
- Wide range input voltage:1.50V~3.63V
- Operating current is as low as 300nA, and can be programmed to 200uA
- Ultra-low shutdown leakage current, lower than 5nA
- Supports rail-to-rail input, the common voltage range is from 0V to input power