Memory & Libraries IP for Samsung

Compare 18 Memory & Libraries IP for Samsung from 9 vendors (1 - 10)

LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
- Compliant for JEDEC standards for LPDDR5X/5/4X/4 with PHY standards
- DFI 5.1 specification PHY Interface Compliant
- Support up to 4 ranks
- x16 and x32 channel support
1.8V general purpose I/O for 4nm FinFET
- Enable higher voltage operation, beyond the foundry IO levels
- Easily replace existing I/O cells
- Integrated scalable ESD protection
- Bias circuit can be shared with multiple I/Os
3.3V general purpose I/O for 28nm CMOS
- Enable higher voltage operation, beyond the foundry IO levels
- Easily replace existing I/O cells
- Integrated scalable ESD protection
- Bias circuit can be shared with multiple I/Os
Four Channel (4CH) LVDS Serializer in Samsung 28FDSOI
- 25-165 MHz clock support
- Up to 1250 Mbps bandwidth/channel
- Up to 5.0 Gbps data throughput
High voltage tolerant I/O
- Scalable robustness
- Area efficient
- low capacitance option
Analog I/O - low capacitance, low leakage
- Scalable robustness
- Area efficient
- low capacitance option
on-chip ESD protection
- Analog I/Os
- ESD Power protection
- Ground pads
- ESD protection cells
On-chip protection against IEC61000-4-2 events
- Analog Pads
- Power Pads
- Ground Pads
I/O LIbrary
- Schmitt triggered input
- pull up/down control modes
- Slew rate controled output
PowerMiser Ultra Low Power Embedded SRAM SE 28FDS
- Up to 60% dynamic power savings
- Up to 25% static power savings