General Purpose PLL IP for Samsung

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Compare 4 General Purpose PLL IP for Samsung from 4 vendors (1 - 4)
  • Integer PLL on Samsung 8nm LN08LPP
    • PLLF0816X is a 1.8V/0.75V dual supply-voltage phase locked loop (PLL) with a wide-output-frequency-range for frequency synthesis.
    • It consists of a phase frequency detector (PFD), a charge pump, a voltage-controlled oscillator (VCO), a 6-bit pre divider, a 10-bit main-divider, a 3-bit scaler, and an automatic frequency control (AFC).
    Block Diagram -- Integer PLL on Samsung 8nm LN08LPP
  • High Speed PLL
    • Silicon proven in 22, 28, 40, 55, 65, 110, 130, 180nm from SMIC, HHgrace, GlobalFoundries and Samsung.
    • Support integer mode, Fraction mode and Spread-Spectrum mode
    • Input reference range:10MHz~100MHz
    • Core Area:0.0678 mm^2  
    Block Diagram -- High Speed PLL
  • Wide Range Programmable Integer PLL on Samsung 14LPP
    • Electrically Programmable PLL for multiple applications
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Implemented with Analog Bits’ proprietary architecture
    • Fully integrated inside customer-specified IO ring
  • Aeonic Generate Clock Generation Module [PLL], 8x smaller than fractional analog solutions
    • Process portable
    • Proven (65nm to 3nm)
    • Full SCAN testable
    • Core voltage supply
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