Adaptive Filter IP
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Adaptive Filter IP
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LMS Adaptive Channel Equalizer
- 17-tap T-spaced complex-arithmetic LMS signed-error Channel Equalizer
- Adaptation bandwidth control (mu, step size)
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TX & RX FIR Filter specifically to support DSP Application
- Synthesizable, technology-independent IP Core for FPGA/ASIC and SoC
- Coded with Verilog
- It support 2 type of filters, Equiripple and Root Rise Cosine (RRC)
- 16/12-bit Fixed-Point Representation/Operation (Imaginary and Real Number)
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CC-100IP-PI Power Integrity Enhancement IP
- Occupies the same on chip area as standard DCAPs with at least a 600X effective capacitance increase
- Up to a 36% Dynamic Power and RF Emissions Reduction
- On-Chip Cybersecurity Enhancement
- 25% Reduction in Capacitor ESL
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RLS Adaptive Filter
- 100x faster than a pure software implementation
- Fully Recursive Least Squares (RLS) solution
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Fast sort IP core
- Special sorting block for hardware implementation
- Low resources requirements
- One clock signal requirements
- Sorted array on each clock cycle
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NTSC/PAL Adaptive 3D Comb Filter and Noise Reducer
- YUV 4:2:2 10 bit in and out
- NTSC/PAL
- Adaptive 3D 4, 5 or 9 taps comb filter
- Perfect Y/C separation even with noisy input