Arithmetic & Logic Unit IP

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Compare 8 Arithmetic & Logic Unit IP from 4 vendors (1 - 8)

Parameterizable pipelined multiplier
- Synthesizeable, technology-independent IP Core for FPGA/ASIC and SoC
- Coded with SystemVerilog
- Wrapped with AXI Stream interface
- 16-bit Fixed-Point Representation/Operation
- Suitable for DSP or Machine Learning Applications
Additive White Gaussian Noise Generator
- High precision AWGN Channel emulator.
- Programmable Pseudo Random Generator(LFSR).
- Programmable number of output bits.
Very Small Form-Factor Division Core
- Optimized design allows customers to target cost efficient FPGAs.
- Can be tailored to customer needs
- Fully synchronous design using only one clock
- Area/Power efficient architecture
DolphinWare Verification Ips
DolphinWare Logic Components Ips
DolphinWare Data Integrity Ips
DolphinWare Control Logic Ips
DolphinWare Arithmetic Components Ips