xSPI Master IP | NOR IP

Overview

Arasan Chip Systems, the leading provider of IP for Mobile Storage Standards, presents its latest xSPI Master IP for access to NOR Flash Devices. This Universal NOR Flash IP supports a variety of NOR Devices and multiple Protocols, combines ease of use with high reliability, low power and speed under all conditions, including automotive applications.

The xSPI master IP supports the xSPI JESD251 standard from a standard AXI4 slave interface, and also features backwards compatibility support for Octal SPI, QSPI, DSPI, and SPI interfaces. Also supports JEDEC SFDP Standard. It is designed so that a user design may immediately access memory from the xSPI device in SPI mode, or alternatively issue a command to switch to any other mode. Additionally, a DMA command may be issued to copy memory from the xSPI device to anywhere else on the bus.

Key Features

  • JESD 251 compliant
    • Protocols 1 & 2
  • JEDEC SFDP Compliant
  • 8b and 4b xSPI
    • Octal SPI, QSPI, DSPI
    • Resets into SPI mode
    • 24 or 32b addressing
    • User selectable cmds
    • XIP high speed support
  • AXI4 Execute in Place
    • Parameterized width
    • Full & Narrow burst
    • Max Bus Throughput
  • AXI4 DMA Host
    • High speed bulk operations
    • Parameterized width
    • Full & Narrow burst
    • Max bus throughput
    • Read Straight to RAM
  • AXI4-Lite Configuration Port
    • Low level command access
  • JESD SFDP support
  • High level software library

Benefits

  • Arasan xSPI Host IP is an Universal SPI Controller supporting Octal SPI, QSPI, DSPI & SPI to access NOR Flash Devices.
  • Total xSPI IP Solution includes xSPI Device, HDK & SW
  • Low Gate Count & Low Power

Block Diagram

xSPI Master IP | NOR IP Block Diagram

Video

Arasan JEDEC compliant xSPI IP a superset of our Octal SPI, QSPI, SPI and PSRAM IP

Arasan Chip Systems, a leading provider of IP for Mobile Storage Standards, presents its JEDEC JESD251C Compliant xSPI IP, a superset of its Octal SPI IP, QSPI IP and PSRAM IP in addition to xSPI providing access to any NOR Flash Device. Arasan's Total xSPI IP, which includes the xSPI PHY IP combines ease of use with high reliability, low power and speed under all conditions, including automotive applications.

Deliverables

  • Verilog RTL Code
  • Homogenous Verilog Test Environment
  • Optional UVM Test Environment
  • Synthesys Scripts
  • xSPI Emulator suitable for integration testing
  • Software Configuration Library
  • User Guide
  • Software configuration library

Technical Specifications

Maturity
Silicon proven
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Semiconductor IP