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AI IP Core

Overview

The low-power and high-perFormance Al IP developed by DeepMentor integrates the SOC of RISC-V. Customers can quickly integrate a unique combination oF silicon intellectual property into an Al SOC chip. System manufacturers do not need to worry about the problems of Al soFtware integration and system development, and can immediately have unique AI products in the market.

We provide a complete system solution: including an operating system, silicon intellectual property driver, and Al model training/miniaturization Functions, DeepLogCore supports RISC-V and ARM systems at the same time, allowing customers to operate Faster, Freely and at a low-cost way to develop  the target market.
 

Key Features

  • High-efficiency Al Silicon Intellectual Property
    • The performance of Al silicon can reach @SO 0Mhz 1 TOP/s.
  • Supports DeepMentor Exclusive Low-distortion MAT Training Models
    • In the case of Int4, the accuracy is only reduced by 1-2%. (Example: yolov4 - 416x416, coco, etc.)
  • High Integrity of Software and Hardware
    • DeepLogCore service includes the operating system, the silicon intellectual property driver, and the establishment and deployment of Al models. Clients don't need to bother to research and integrate silicon intellectual property.
  • Complete Maintenance and Retraining Systems
    • Products can be updated at any time by using the maintenance and retraining services on our DeepLogMaker platform.

Benefits

  • Flexible and Customizable Al Silicon Intellectual Property
    • We split the basic operations of Al models to make the combination arbitrary. Clients can remove unnecessary parts according to their product requirements to minimize costs.
  • Cloud Al Model on Edge
    • Because of DeepMentor's unique MAT technology, we can miniaturize large-scale algorithms and place them on edge devices for execution. We don't need to endure the inaccuracy and uncertainty brought by small-scale Al algorithms, and we can save the arduous engineering process of optimizing algorithms.
  • Customize the Number of CPU Core
    • 1-4 CPU cores can be adjusted according to the requirement.
  • Support RISC-V and ARM Architecture
    • The RISC-C and AI SoC reference designs with floating point functions are fully integrated, saving many licensing fees and development time.

Block Diagram

AI IP Core Block Diagram

Applications

  • Object classification
  • Object detection
  • Face detection/identification
  • Human pose detection
  • Hand-gesture recognition
  • Eye tracking
  • Image segmentation
  • Image beautification
  • Super resolution
     

Technical Specifications

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AI IP Core
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