VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO Library
Overview
VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.11um (0.13um 90% direct shrink) Logic 1P8M Salicide 1.2/3.3V process. This library provides 5V analog IO pads. This library supports Device Under Pad (DUP).
Key Features
- SMIC 0.11um Logic 1P8M Salicide 1.2/3.3V process
- Provides 5V analog IO pads
- Supports Device Under Pad (DUP)
- Provides cells to interface with Generic IO library
- Suitable for six, seven, or eight metal layers of physical design
Technical Specifications
Foundry, Node
SMIC 0.11um
SMIC
Pre-Silicon:
110nm
G
Related IPs
- VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V ANALOGIO_DUP_05 IO Library
- VeriSilicon SMIC 0.13μm 1.2V/3.3V VPPIO_DUP_01 IO Library
- VeriSilicon CHRT 0.13um 1.2V/3.3V DUPIO_01 Library
- VeriSilicon TSMC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library
- VeriSilicon SMIC 0.13um 1.2V/2.5V ANALOGIO_DUP_05 IO Library
- VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library