VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O
Overview
VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O Cell (01E) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18μm Logic 1P6M Low Power Salicide 1.8/3.3V process. This library supports Inline DUP (Device under pad) I/O pads. With configurable output driving strength and selective output slew rate control, this library can work under different IO supply operating voltages such as 1.8v, 2.5v, or 3.3v.
Key Features
- Process: Grace Semiconductor Manufacturing Corporation (GSMC)0.18um Logic 1P6M Low Power Salicide 1.8/3.3V process
- Supply voltage:
- ------1.62V~3.6V for I/O supply
- ------1.8V core power supply
- Configurable output strength
- Selective output slew rate control
- Provides bi-directional, input only, output only and bi-directional buffer
- with pull-up only cells
- DUP (Device under PAD) with inline I/O cells
Technical Specifications
Foundry, Node
GSMC,0.18um
Maturity
Pre-Silicon