Ultra Low Resource AES Cores

Overview

The Helion Tiny AES core is our smallest solution, and was designed specifically for applications where data rates are low and minimal area and power consumption are paramount. This requirement applies to many applications, for example set-top boxes, mobile wireless communications systems or satcomms. The result is the smallest fully featured AES solution available today spanning all ASIC and FPGA technologies.

Despite its extremely small footprint, the Tiny AES core is a very capable performer. It offers full AES encryption and decryption using any combination of the three AES key sizes (128, 192, and 256-bits). It can be used to implement any of the common block cipher modes specified in NIST SP800-38A.

Key Features

  • Very low footprint, fully featured AES
  • AES-128 encryption from ~3,500 gates in ASIC
  • AES-128 encryption from 50 slices in Xilinx
  • AES-128 encryption from 180 ALMs in Altera

Deliverables

  • Netlist or RTL source code
  • Self-checking HDL testbench
  • Example simulation with NIST AES validation test vectors
  • Comprehensive user documentation

Technical Specifications

Foundry, Node
Any
Maturity
Silicon proven
Availability
Now
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Semiconductor IP