Ultra Low Power Embedded SRAM - TSMC 22ULL

Overview

PowerMiser^TM is the ideal single-port synchronous low-power SRAM IP for energy efficient SoC systems in a wide range of market applications.

It reduces dynamic power by up to 50% and static/leakage power by up
to 20% compared to foundry and other SRAM solutions. It delivers these
savings across the full process, voltage and temperature range.
PowerMiser is available for 28nm, 22nm process node designs and scales
down to 16nm and 7nm FinFET

sureCore achieves best-in-class power savings by augmenting standard
foundry memory bit cells with its innovative, patented architecture,
powerful compiler technology and a set of industry standard sleep modes.
Product development includes the implementation and execution of
a comprehensive verifi cation and characterization strategy.

Key Features

Single port, single voltage rail synchronous SRAM
Hierarchical Bit Line – subdividing the array into columns/ rows, banks and local blocks.
Configurable mux factor sets column length and overall aspect ratio
Bit Line Voltage control eliminates potential low operating voltages issues
Enable only required local block word line and bit line drivers
SVT, HVT, UHVT periphery
Operating voltage: 0.9V +/-10% in 28nm, 0.8v +/-10% in 22nm
Retention voltage: 0.55V in 28FDSOI, 0.63V in 28HPC+, 0.6V in 22ULL
Configurable word length, up to 144 bits
Configurable 32 or 64 bit lines
Programmable sleep modes: Light Sleep, Deep Sleep (data retention), Shutdown
576Kbit max instance size. Configurable – 4Kx144, 8KX72, 16Kx36
APTG and BIST support
Supports industry standard EDA design flows

Benefits

Delivers both dynamic power savings and static power savings compared to industry standard SRAMs
Ideal for replacing current SRAM IP and delivering SoC-wide power benefits

Block Diagram

Technical Specifications

Foundry, Node

TSMC 22 ULL

TSMC

Pre-Silicon: 22nm

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