True Random Number Generator (TRNG) Analog Noise Source

Overview

Key Features

• robust, fully-integrated, state-of-the-art physical entropy source
• differential jitter extraction through a PLL-based fully symmetric architecture
• stochastic model of the entropy source for AIS 31 certification
• asynchronous random clock signal output
• random stream synchronization through an external sampling clock;
• typical characteristics of a 55 nm implementation: compliant with the AIS 31 standard (Method A, Procedure A) up to 100 kbit/s; with optional digital post-processing: fully compliant with the AIS 31 (Method A & B) and NIST SP 800-90B standards up to 100 kbit/s; startup time shorter than 80 µs; power-supply voltage range: 1.2 V ±10%; operating current smaller than 40 µA; standby current lower than 1 µA; operating junction temperature range: -40°C to 125°C; silicon area smaller than 0.02 mm²
• silicon proven in 130 nm, 110 nm, 65 nm and 55 nm CMOS processes
• digital post-processing available separately

Benefits

• AIS 31 compliant
• Fully integrated
• Robust architecture
• Analog-based source
• Low power consumption

Deliverables

• GDSII stream and layer map file
• Library Exchange Format (LEF) file
• Circuit Description Language (CDL) netlist
• Liberty Timing File (.lib)
• VHDL behavioral model
• design specification

Technical Specifications